1. Field of the Invention
The present invention relates generally to the field of high voltage switches and circuit interrupting devices and more particularly to a pre-insertion inductor arrangement to limit transient irush current and/or voltages during the closing of the circuit.
2. Related Art:
A number of prior art arrangements are directed to pre-insertion resistors for circuit interrupting devices wherein a resistor is either inserted in series with a high-voltage switch or in parallel with a switch gap during closing movement of the switch or interrupting unit to reduce audible and electrical noise and to limit transient inrush current and/or voltages incident to completion of the circuit by the switch or interrupting unit. For example, pre-insertion resistors of this type are shown in the following U.S. Pat. Nos.: 3,588,406; 3,576,414; 3,566,061; 3,763,340; 4,069,406; 4,072,836; and 4,324,959. Without the pre-insertion resistor, as the circuit interrupting device is closed, the inrush current may reach values of 10 to 30 thousand amperes where the circuit interrupting device is used in conjunction with back-to-back capacitor banks. Additionally, during single bank energization of a capacitor bank, large voltage transients may also be produced. Such transient current and/or voltages can produce undesirable noise, both audible and electrical, and can, of course, also lead to distress or damage of items connected to the circuit. For example, see Bayless, et al, "CAPACITOR SWITCHING AND TRANSFORMER TRANSIENTS," 1986 IEEE PES Summer Meeting, Paper No. 86 SM 419-6. With the pre-insertion resistor, the inrush current arising from back-to-back capacitor banks is limited to much lower values, perhaps in the range of 2 to 4 thousand amperes, which can be carried by the circuit without undue distress. Since the pre-insertion resistor is in the circuit only briefly during the closing of the circuit interrupting device, the pre-insertion resistor is not required to carry the continuous current of the circuit except during the portion of the insertion time after the inrush. However, the pre-insertion resistor must be designed to dissipate the power losses incurred during the insertion time; e.g., some fraction of a second, with the high frequency inrush current flowing during an initial portion of the insertion time followed by the 60 Hz capacitor-bank circuit current during the remainder of the insertion time. Pre-insertion resistors of this type are generally fabricated from a stack of cylindrical resistor cakes or blocks as illustrated in the aforementioned U.S. Pat. No. 3,576,414. It has been found that for the relatively long insertion-time applications referred to hereinbefore, it is difficult to achieve a resistor block that provides reliability over a desirable operating life. In addition, it would be desirable to use a pre-insertion resistor for certain large-size capacitor banks and/or where frequent switching may be required. However, the pre-insertion resistors of the prior art are not entirely suitable for these applications since it is difficult to achieve a pre-insertion resistor to reliably and frequently withstand the inrush current and the energy dissipated during the insertion time.
Another approach to damping or limiting the inrush current incident to the completion of the circuit by a high-voltage switch is the continuous, permanent connection of an inductor in the circuit. However, such an arrangement does have its drawbacks since the inductor must be designed to carry continuous load currents and fault currents. In addition, there are ongoing costs associated with the power losses in the inductor on a continuous basis. Accordingly, it is difficult to achieve an inductor of the desired capacity and inductance in a reasonable volume and at a reasonable cost.
A number of other prior art arrangements utilize various switched combinations of resistors, inductors and/or capacitors during switch opening or to damp voltage transients upon switch closing. For example, U.S. Pat. No. 4,443,674 utilizes precision timimg means for the insertion and removal of an impedance via impedance contacts 130 in parallel with the interrupter contacts 120 to damp voltage transients. The impedance contacts 130 are closed approximately 10 msec before the interrupter contacts 120 are closed and the impedance contacts 130 are opened several milliseconds after the interrupter contacts 120 are closed. In such a precision-timing insertion arrangement, the selection of the impedance is of no particular consequence since the duration of insertion is short and the energy dissipation in the impedance is relatively low. Other insertion arrangements of this type to limit fault currents or voltage transients during opening of a switch are disclosed in U.S. Pat. Nos. 3,912,975; 3,927,350; 3,836,819; 3,376,475; 3,148,260; 4,184,186; and 4,550,356. The arrangement of U.S. Pat. No. 3,614,530 is directed to the control of voltage transients and includes a bypass/parallel switch that is connected across a resistor to selectively insert the resistor to provide losses to a resonant circuit including the line capacitance and a shunt reactor that is in series with the parallel combination of the bypass/parallel switch and the resistor. The shunt branch of the reactor and switch-resistor combination are connected between the load side of the circuit breaker and ground. U.S. Pat. No. 4,567,538 illustrates a current-limiting apparatus including a switch that is operable upon the occurence of a fault in either of two power systems to limit current flowing between the two power systems. Two series circuits are connected in parallel with each other and between the two power system lines. The switch is connected between an intermediate point of each of the two series circuits so as to form a parallel-resonance circuit to limit current flowing between the power system lines when the switch is closed. When the switch is open, one of the series circuits is series-resonant so that the two series circuits provides a very low total impedance between the two power system lines.
While the aforementioned prior art arrangements may be suitable for their intended use in accordance with their respective defined applications, as discussed hereinbefore, it would be desirable to provide an efficient and compact insertion arrangement to limit transient inrush current and/or voltages while not requiring resistor blocks or precise timing of the insertion.